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- Kim, Jingook
- Integrated Circuit and Electromagnetic Compatibility Lab.
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| DC Field | Value | Language |
|---|---|---|
| dc.citation.conferencePlace | US | - |
| dc.citation.conferencePlace | Hyatt Regency MontereyMonterey | - |
| dc.citation.endPage | 278 | - |
| dc.citation.startPage | 275 | - |
| dc.citation.title | 11th Topical Meeting on Electrical Performance of Electronic Packaging, EPEP 2002 | - |
| dc.contributor.author | Kim, Jingook | - |
| dc.contributor.author | Kim, Hyungsoo | - |
| dc.contributor.author | Jeong, Youchul | - |
| dc.contributor.author | Kim, Joungho | - |
| dc.date.accessioned | 2023-12-20T06:08:04Z | - |
| dc.date.available | 2023-12-20T06:08:04Z | - |
| dc.date.created | 2013-07-17 | - |
| dc.date.issued | 2002-10-21 | - |
| dc.description.abstract | We propose new slot shapes to reduce crosstalk, reflection, and radiated emission from the slotted reference plane in multi-layer PCBs or packages. The reduction is successfully demonstrated by the simulations and the measurements. | - |
| dc.identifier.bibliographicCitation | 11th Topical Meeting on Electrical Performance of Electronic Packaging, EPEP 2002, pp.275 - 278 | - |
| dc.identifier.doi | 10.1109/EPEP.2002.1057931 | - |
| dc.identifier.scopusid | 2-s2.0-28444460077 | - |
| dc.identifier.uri | https://scholarworks.unist.ac.kr/handle/201301/35845 | - |
| dc.identifier.url | https://ieeexplore.ieee.org/document/1057931 | - |
| dc.language | 영어 | - |
| dc.publisher | 11th Topical Meeting on Electrical Performance of Electronic Packaging, EPEP 2002 | - |
| dc.title | Tapered slot shape on slotted reference plane of multi-layer PCB for reduction of crosstalk and radiated emission | - |
| dc.type | Conference Paper | - |
| dc.date.conferenceDate | 2002-10-21 | - |
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