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Lee, Kyuho Jason
Intelligent Systems Lab.
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A 646GOPS/W multi-classifier many-core processor with cortex-like architecture for super-resolution recognition

Park, JunyoungHong, InjoonKim, GyeonghoonKim, YouchangLee, KyuhoPark, SeongwookBong, KyeongryeolYoo, Hoi-Jun
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IEEE International Solid-State Circuits Conference, pp.168 - 169
Object recognition processors have been reported for the applications of autonomic vehicle navigation, smart surveillance and unmanned air vehicles (UAVs) [1-3]. Most of the processors adopt a single classifier rather than multiple classifiers even though multi-classifier systems (MCSs) offer more accurate recognition with higher robustness [4]. In addition, MCSs can incorporate the human vision system (HVS) recognition architecture to reduce computational requirements and enhance recognition accuracy. For example, HMAX models the exact hierarchical architecture of the HVS for improved recognition accuracy [5]. Compared with SIFT, known to have the best recognition accuracy based on local features extracted from the object [6], HMAX can recognize an object based on global features by template matching and a maximum-pooling operation without feature segmentation. In this paper we present a multi-classifier many-core processor combining the HMAX and SIFT approaches on a single chip. Through the combined approach, the system can: 1) pay attention to the target object directly with global context consideration, including complicated background or camouflaging obstacles, 2) utilize the super-resolution algorithm to recognize highly blurred or small size objects, and 3) recognize more than 200 objects in real-time by context-aware feature matching.
2013 60th IEEE International Solid-State Circuits Conference, ISSCC 2013


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