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Bien, Franklin
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Sandwiched-Gate Inverter: Novel Device Structure for Future Logic Gates

Author(s)
Ryu, MyunghwanBien, FranklinKim, Youngmin
Issued Date
2015-09-09
DOI
10.1109/SISPAD.2015.7292356
URI
https://scholarworks.unist.ac.kr/handle/201301/35484
Fulltext
http://ieeexplore.ieee.org/document/7292356/
Citation
International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), pp.442 - 445
Abstract
In this paper, we propose a novel sandwiched-gate inverter by using of an NMOS GAA together with a donut-type PMOS. The DC operation and the transient performance of the proposed inverter were investigated with 3D TCAD simulations. The proposed inverter exhibits a correct inverter operation with a high noise margin and speed.
Publisher
IEEE

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