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- Lee, Jongeun
- Intelligent Computing and Codesign Lab.
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| DC Field | Value | Language |
|---|---|---|
| dc.citation.conferencePlace | KO | - |
| dc.citation.title | 제25회 반도체학술대회 | - |
| dc.contributor.author | Aidyn Zhakatayev | - |
| dc.contributor.author | Lee, Jongeun | - |
| dc.date.accessioned | 2023-12-19T17:37:26Z | - |
| dc.date.available | 2023-12-19T17:37:26Z | - |
| dc.date.created | 2019-12-21 | - |
| dc.date.issued | 2018-02-05 | - |
| dc.identifier.bibliographicCitation | 제25회 반도체학술대회 | - |
| dc.identifier.uri | https://scholarworks.unist.ac.kr/handle/201301/33846 | - |
| dc.publisher | 대한전자공학회 | - |
| dc.title | Reducing FPGA Area Using Nano-Switch Devices in Inter and Intra-Logic Routing | - |
| dc.type | Conference Paper | - |
| dc.date.conferenceDate | 2018-02-04 | - |
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