JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.19, no.1, pp.129 - 136
A low-power neural network classifier processor is proposed for real-time mobile scene classification. It has analog-digital mixed-mode architecture to save power and area while preserving fast operation speed and high classification accuracy. Its current-mode analog datapath replaces massive digital computations such as multiply-accumulate and look-up table operations, which saves area and power by 84.0% and 82.2% than those of digital ASIC implementation. Moreover, the processor integrates a multi-modal and highly controllable radial basis function circuit that compensates for the environmental noise to make the processor maintain high classification accuracy despite of temperature and supply voltage variations, which are critical in mobile devices. In addition, its reconfigurable architecture supports both multi-layer perceptron and radial basis function network. The proposed processor fabricated in 0.13 mm CMOS process occupies 0.14 mm2 with 2.20 mW average power consumption and attains 92% classification accuracy.