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Lee, Myunghee
Automotive Electronic Systems and Semiconductor Lab
Research Interests
  • Automotive Electronic System Design
  • Automtoive Semicondutor IC design

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Scaleable CMOS current-mode preamplifier design for an optical receiver

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Title
Scaleable CMOS current-mode preamplifier design for an optical receiver
Author
Lee, MyungheeVendier, OBrooke, MAJokerst, NM
Issue Date
1997-02
Publisher
SPRINGER
Citation
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, v.12, no.2, pp.133 - 144
Abstract
We have designed a process-insensitive preamplifier for an optical receiver, fabricated it in several different minimum feature sizes of standard digital CMOS, and demonstrated design scaleability of this analog integrated circuit design. The same amplifier was fabricated in a 1.2 mu m and two different 0.8 mu m processes through the MOSIS foundry [1]. The amplifier uses a multi-stage, low-gain-per-stage approach. It has a total of 5 identical cascaded stages. Each stage is essentially a current mirror with a current gain of 3. Three of these preamplifiers have been integrated with a GaAs Metal-Semiconductor-Metal (MSM) photodetector and one with an InGaAs MSM detector by using a thin-film epilayer device separation and bonding technology [2]. This quasi-monolithic front-end of an optical receiver virtually eliminates the parasitics between the photodetector and the silicon CMOS preamplifier. We have demonstrated speed and power dissipation improvement as the minimum feature size of the transistors shrink
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DOI
10.1023/A:1008217109255
ISSN
0925-1030
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EE_Journal Papers
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