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A novel methodology for speeding up IC performance in 32nm FinFET File File

Nguyen, Hung Viet , Ryu, Myunghwan , Kim, Youngmin

Article Issue Date2012-02 View98
Highly Strained Si pFinFET on SiC With Good Control of Sub-Fin Leakage and Self-Heating File

Shin, Donggwan , Jeong, Changwook , Jeon, Jongwook , Chung, Ilsub

Article Issue Date2014-12 View86
Impacts of Trapezoidal Fin of 20-nm Double-Gate FinFET on the Electrical Characteristics of Circuits File

Ryu, Myunghwan , Kim, Youngmin

Article Issue Date2015-08 View157
Low Leakage III-V/Ge CMOS FinFET Design for High-Performance Logic Applications with High-kappa Spacer Technology File

Jang, Esan , Shin, Sunhae , Jeong, Jae Won , Kim, Kyung Rok

Article Issue Date2018-06 View85
Simple and accurate modeling of the 3D structural variations in FinFETs File File

Kim, Donghu

Thesis Issue Date2013-08 View82
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