| 2009-07 | A Compiler Optimization to Reduce Soft Errors in Register Files | Lee, Jongeun; Shrivastava, Aviral | ARTICLE | 714 |
| 2009-06-19 | A Compiler Optimization to Reduce Soft Errors in Register Files | Lee, Jongeun; Shrivastava, Aviral | CONFERENCE | 115 |
| 2010-07 | A Compiler-Microarchitecture Hybrid Approach to Soft Error Reduction for Register Files | Lee, Jongeun; Shrivastava, A. | ARTICLE | 706 |
| 2016-10-23 | A new approach to binarizing neural networks | Seo, Jungwoo; Yu, Joonsang; Lee, Jongeun; Choi, Kiyoung | CONFERENCE | 155 |
| 2017-06-18 | A New Stochastic Computing Multiplier with Application to Deep Convolutional Neural Networks | Sim, Hyeonuk; Lee, Jongeun | CONFERENCE | 131 |
| 2009-01-19 | A Software Solution for Dynamic Stack Management on Scratch Pad Memory | Kannan, Arun; Shrivastava, Aviral; Pabalkar, Amit; Lee, Jongeun | CONFERENCE | 103 |
| 2009-11 | A Software-Only Solution to Use Scratch Pads for Stack Data | Shrivastava, Aviral; Kannan, Arun; Lee, Jongeun | ARTICLE | 855 |
| 2017-11-05 | Accurate and Efficient Stochastic Computing Hardware for Convolutional Neural Networks | Yu, Joonsang; Kim, Jyounghoon; Lee, Jongeun; Choi, Kiyoung | CONFERENCE | 161 |
| 2003-07 | An algorithm for mapping loops onto coarse-grained reconfigurable architectures | Lee, Jongeun; Choi, K; Dutt, ND | ARTICLE | 1379 |
| 2003-06-11 | An Algorithm For Mapping Loops Onto Coarse-Grained Reconfigurable Architectures | Lee, Jongeun; Choi, K; Dutt, ND | CONFERENCE | 80 |
| 2018-12 | An Efficient and Accurate Stochastic Number Generator Using Even-distribution Coding | Zhakatayev, Aidyn; Kim, Kyounghoon; Choi, Kiyoung; Lee, Jongeun | ARTICLE | 678 |
| 2016-01-25 | An Energy-Efficient Random Number Generator for Stochastic Circuits | Kim, Kyounghoon; Lee, Jongeun; Choi, Kiyoung | CONFERENCE | 106 |
| 2016-02 | Application-Level Performance Improvement for Stream Program on CGRA-based systems | Lee, Jongeun; Lee, Hongsik | Master's thesis | 647 |
| 2015-11-02 | Approximate De-randomizer for Stochastic Circuits | Kim, Kyounghoon; Lee, Jongeun; Choi, Kiyoung | CONFERENCE | 128 |
| 2013-10 | Architecture Customization of On-Chip Reconfigurable Accelerators | Yoon, Jonghee W.; Lee, Jongeun; Park, Sanghyun; Kim, Yongjoo; Lee, Jinyong; Paek, Yunheung; Cho, Doosan | ARTICLE | 728 |
| 2018-03-25 | Architecture exploration of standard-cell and FPGA-overlay CGRAs using the open-source CGRA-ME framework | Chin, S. Alexander; Niu, Kuang Ping; Walker, Matthew; Yin, Shizhang; Mertens, Alexander; Lee, Jongeun; Anderson, Jason H | CONFERENCE | 94 |
| 2020-09-07 | Architecture-Accuracy Co-optimization of ReRAM-based Low-cost Neural Network Processor | Lee, Segi; Lee, Sugil; Lee, Jongeun; Choi, Jong-Moon; Kwon, Do-Wan; Hong, Seung-Kwang; Kwon, Kee-Won | CONFERENCE | 222 |
| 2021-06-20 | Automated Log-Scale Quantization for Low-Cost Deep Neural Networks | Oh, Sangyun; Sim, Hyeonuk; Lee, Sugil; Lee, Jongeun | CONFERENCE | 7 |
| 2010-09 | Binary acceleration using coarse-grained reconfigurable architecture | Paek, Jong Kyung; Choi, Kiyoung; Lee, Jongeun | ARTICLE | 751 |
| 2020-12 | Bitstream-Based Neural Network for Scalable, Efficient, and Accurate Deep Learning Hardware | Sim, Hyeonuk; Lee, Jongeun | ARTICLE | 162 |
