2016-02-02 | 10.7 A 185fsrms-integrated-jitter and -245dB FOM PVT-robust ring-VCO-based injection-locked clock multiplier with a continuous frequency-tracking loop using a replica-delay cell and a dual-edge phase detector | Choi, Seojin; Yoo, Seyeon; Choi, Jaehyouk | CONFERENCE | 492 |
2018-06-20 | 153 fsRMS-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHz Ring-LC-Hybrid Injection-Locked Clock Multiplier | Choi, Seojin; Yoo, Seyeon; Lee, Yongsun; Jo, Yongwoo; Lee, Jeonghyun; Lim, Younghyun; Choi, Jaehyouk | CONFERENCE | 371 |
2019-02-17 | 30.9 A 140fs rms -Jitter and -72dBc-Reference-Spur Ring-VCO-Based Injection-Locked Clock Multiplier Using a Background Triple-Point Frequency/Phase/Slope Calibrator | Yoo, Seyeon; Choi, Seojin; Lee, Yongsun; Seong, Taeho; Lim, Younghyun; Choi, Jaehyouk | CONFERENCE | 415 |
2017-06-07 | A -242-dB FOM and -71-dBc Reference Spur Ring-VCO-Based Ultra-Low Jitter Switched-Loop-Filter PLL Using Fast Phase-Error Correction Technique | Seong, Taeho; Lee, Yongsun; Yoo, Seyeon; Choi, Jaehyouk | CONFERENCE | 299 |
2016-03 | A 0.56-2.92 GHz Wideband and Low Phase Noise Quadrature LO-Generator Using a Single LC-VCO for 2G-4G Multistandard Cellular Transceivers | Yoon, Heein; Lee, Youngsun; Lim, Younghyun; Tak, Guemyoung; Kim, Hongdeuk; Ho, Yocheol; Choi, Jaehyouk | ARTICLE | 1390 |
2019-06-09 | A 0.5V-VIN, 0.29ps-Transient-FOM, and Sub-2mV-Accuracy Adaptive-Sampling Digital LDO Using Single-VCO-Based Edge-Racing Time Quantizer | Lee, Jeonghyun; Bang, Jooeun; Lim, Younghyun; Choi, Jaehyouk | CONFERENCE | 358 |
2010-03 | A 122-mW Low-Power Multiresolution Spectrum-Sensing IC With Self-Deactivated Partial Swing Techniques | Song, Taejoong; Park, Jongmin; Lee, Sang Min; Choi, Jaehyouk; Kim, Kihong; Lee, Chang-Ho; Lim, Kyutae; Laskar, Joy | ARTICLE | 1135 |
2020-02-16 | A 170MHz-Lock-In-Range and −253dB-FoMjitter 12-to-14.5GHz Subsampling PLL with a 150µW Frequency-Disturbance-Correcting Loop Using a Low-Power Unevenly Spaced Edge Generator | Lim, Younghyun; Kim, Juyeop; Jo, Yongwoo; Bang, Jooeun; Yoo, Seyeon; Park, Hangi; Yoon, Heein; Choi, Jaehyouk | CONFERENCE | 380 |
2013-11 | A 2-8 GHz wideband dually frequency-tuned ring-VCO with a scalable K VCO | Yoo, Seyeon; Kim, Jae Joon; Choi, Jaehyouk | ARTICLE | 1336 |
2018-09-03 | A 320μV-Output Ripple and 90ns-Settling Time at 0.5V Supply Digital-Analog-Hybrid LDO Using Multi-Level Gate-Voltage Generator and Fast-Decision PD Detector | Lim, Younghyun; Lee, Jeonghyun; Lee, Yongsun; Yoo, Seyeon; Choi, Jaehyouk | CONFERENCE | 286 |
2015-06-18 | A 450-fs jitter PVT-robust fractional-resolution injection-locked clock multiplier using a DLL-based calibrator with replica-delay-cells | Kim, Mina; Choi, Seojin; Choi, Jaehyouk | CONFERENCE | 290 |
2018-07 | A 65-nm CMOS 2 x 2 MIMO Multi-Band LTE RF Transceiver for Small Cell Base Stations | Lim, Kyoohyun; Lee, Sanghoon; Lee, Yongha; Moon, Byeongmoo; Shin, Hwahyeong; Kang, Kisub; Kim, Sungbeom; Lee, Jihyeok; Lee, Hyungsuk; Shim, Hyunchul; Sung, Chulhoon; Park, Kumyoung; Lee, Garam; Kim, Minjung; Park, Seokyeong; Jung, Hyosun; Lim, Younghyun; Song, Changhun; Seong, Jaehyeon; Cho, Heechang; Choi, Jaehyouk; Lee, Jongryul; Han, Sangwoo | ARTICLE | 1397 |
2012-09-10 | A 65nm CMOS current controlled oscillator with high tuning linearity for wideband polar modulation | Choi, Jaehyouk; Hu, Jianyun; Leung, L; Narathong, C; Park, Jongmin; Sahota, K | CONFERENCE | 289 |
2019-02-17 | A 76fs rms Jitter and -40dBc Integrated-Phase-Noise 28-to-31GHz Frequency Synthesizer Based on Digital Sub-Sampling PLL Using Optimally Spaced Voltage Comparators and Background Loop-Gain Optimization | Kim, Juyeop; Yoon, Heein; Lim, Younghyun; Lee, Yongsun; Cho, Yoonseo; Seong, Taeho; Choi, Jaehyouk | CONFERENCE | 409 |
2013-08 | A CMOS highly linear hybrid current/voltage controlled oscillator for wideband polar modulation | Tang, Yiwu; Hu, Jianyun; Park, Jongmin; Choi, Jaehyouk; Leung, Lincoln; Narathong, Chiewcharn; Sahota, Kamal | ARTICLE | 1148 |
2017-09 | A Fully Integrated Dual-Mode CMOS Power Amplifier With an Autotransformer-Based Parallel Combining Transformer | Ahn, Hyunjin; Baek, Seungjun; Ilku Nam; An, Deokgi; Lee, Jae Kyung; Jeong, Minsu; Kim, Bo-Eun; Choi, Jaehyouk; Lee, Ockgoo | ARTICLE | 859 |
2015-03 | A Low Phase Noise Injection-Locked Programmable Reference Clock Multiplier with a Two-Phase PVT-Calibrator for ΔΣ PLLs | Lee, Yongsun; Kim, Mina; Seong, Taeho; Choi, Jaehyouk | ARTICLE | 1341 |
2011-04 | A Low Power and Wide Range Programmable Clock Generator With a High Multiplication Factor | Choi, Jaehyouk; Kim, Stephen T.; Kim, Woonyun; Kim, Kwan-Woo; Lim, Kyutae; Laskar, Joy | ARTICLE | 1102 |
2018-02 | A Low-Integrated-Phase-Noise 27-30-GHz Injection-Locked Frequency Multiplier With an Ultra-Low-Power Frequency-Tracking Loop for mm-Wave-Band 5G Transceivers | Yoo, Seyeon; Choi, Seojin; Kim, Juyeop; Yoon, Heein; Lee, Yongsun; Choi, Jaehyouk | ARTICLE | 903 |
2016-02 | A Low-Jitter and Fractional-Resolution Injection-Locked Clock Multiplier Using a DLL-Based Real-time PVT-Calibrator with Replica-Delay Cells | Kim, Mina; Choi, Seojin; Seong, Taeho; Choi, Jaehyouk | ARTICLE | 1071 |