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김진국

Kim, Jingook
Integrated Circuit and Electromagnetic Compatibility Lab.
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Calculation of Power-Supply-Induced Jitter at a 3-D IC channel including ESD Protection Circuits

Author(s)
Park, EunkyeongKim, JingookLee, JongjooPark, Youngwoo
Issued Date
2015-08-18
DOI
10.1109/ISEMC.2015.7256360
URI
https://scholarworks.unist.ac.kr/handle/201301/46655
Fulltext
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7256360
Citation
2015 Joint IEEE International Symposium on Electromagnetic Compatibility and EMC Europe, pp.1310 - 1314
Abstract
The step response of a single ended output driver with silicon interposer channel is derived including the parasitics of ESD protection circuits. The probability density functions of the output voltage due to supply voltage fluctuations are also analytically calculated. With changing the frequency of supply voltage fluctuations, the effect of ESD parasitics on the output jitter is calculated and compared.
Publisher
IEEE International Symposium on Electromagnetic Compatibility and EMC Europe
ISSN
10774076

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