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153 fsRMS-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHz Ring-LC-Hybrid Injection-Locked Clock Multiplier

Author(s)
Choi, SeojinYoo, SeyeonLee, YongsunJo, YongwooLee, JeonghyunLim, YounghyunChoi, Jaehyouk
Issued Date
2018-06-20
DOI
10.1109/VLSIC.2018.8502355
URI
https://scholarworks.unist.ac.kr/handle/201301/32727
Fulltext
https://ieeexplore.ieee.org/document/8502355
Citation
IEEE Symposium on VLSI Circuits
Abstract
This work presents an ultra-low-jitter hybrid injection-locked clock multiplier (ILCM) that cascades a ring ILCM and an LC ILCM to achieve a high multiplication factor of 114. A dual-purpose frequency calibrator (DPFC) that can calibrate the frequency drifts of the two VCOs, concurrently, consumes only 400 μW. The RMS-jitter of the output signal at 22.8 GHz was 153 fs. Due to the DPFC, RMS-jitter was maintained to be less than 180 fs, across supply voltages and temperatures.
Publisher
IEEE

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