2016-02-02 | 10.7 A 185fsrms-integrated-jitter and -245dB FOM PVT-robust ring-VCO-based injection-locked clock multiplier with a continuous frequency-tracking loop using a replica-delay cell and a dual-edge phase detector | Choi, Seojin; Yoo, Seyeon; Choi, Jaehyouk | CONFERENCE | 82 |
2013-03-15 | 1060 nm tunable monolithic high index contrast subwavelength grating vertical-cavity surface-emitting laser | Ansbæk, Thor; Chung, Il-Sug; Yvind, Kresten | CONFERENCE | 57 |
2014-03-15 | 130-nm tunable grating-mirror VCSEL (invited) | Chung, Il-Sug; Mork, Jesper | CONFERENCE | 34 |
2019-11-22 | 14bit 전류DAC 입력기반 다파형 4채널 자극기 | Yeom, Jun Young; Cho, Jeonghoon; Kim, Jae Joon | CONFERENCE | 70 |
2018-06-20 | 153 fsRMS-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHz Ring-LC-Hybrid Injection-Locked Clock Multiplier | Choi, Seojin; Yoo, Seyeon; Lee, Yongsun; Jo, Yongwoo; Lee, Jeonghyun; Lim, Younghyun; Choi, Jaehyouk | CONFERENCE | 74 |
2019-02-17 | 16.2 A 76fs rms Jitter and -40dBc Integrated-Phase-Noise 28-to-31GHz Frequency Synthesizer Based on Digital Sub-Sampling PLL Using Optimally Spaced Voltage Comparators and Background Loop-Gain Optimization | Kim, Juyeop; Yoon, Heein; Lim, Younghyun; Lee, Yongsun; Cho, Yoonseo; Seong, Taeho; Choi, Jaehyouk | CONFERENCE | 58 |
2012-06 | 2G/2.5G (GSM/GPRS/EDGE) 표준 활동 분석을 통해 바라본 셀룰러 통신망의 향후 발전 방향 | 류진숙; 이재용 | CONFERENCE | 39 |
2016-07-06 | 2차측 누설 인덕턴스를 고려한 고주파 LLC 공진형 컨버터의 최적 설계 | 박화평; 김민아; 정지훈 | CONFERENCE | 57 |
2017-10-24 | 3 Level NPC Dual Active Bridge Capacitor Voltage Balancing Switching Modulation | Lee, Jun-young; Choi, Hyun-Jun; Jung, Jee-Hoon | CONFERENCE | 65 |
2014-05-11 | 3-D FDFD non-conformal domain decomposition method for modeling RDL traces on silicon interposer | Xie, Biancun; Swaminathan, Madhavan; Han, Ki Jin; Xie, Jianyong | CONFERENCE | 39 |
2017-07-06 | 3-레벨 NPC Dual Active Bridge DC-DC 컨버터의 중성점 전압 제어를 위한 향상된 스위칭 알고리즘 | 이준영; 최현준; 조진태; 정지훈 | CONFERENCE | 44 |
2019-02-17 | 30.9 A 140fs rms -Jitter and -72dBc-Reference-Spur Ring-VCO-Based Injection-Locked Clock Multiplier Using a Background Triple-Point Frequency/Phase/Slope Calibrator | Yoo, Seyeon; Choi, Seojin; Lee, Yongsun; Seong, Taeho; Lim, Younghyun; Choi, Jaehyouk | CONFERENCE | 51 |
2012-05-30 | 32 nm FinFET-based 0.7-to-1.1 V digital voltage sensor with 50 mV resolution | Kim, Youngmin; Nguyen, HV | CONFERENCE | 34 |
2002-05-26 | 3D mesh compression using triangle fan structure | Sim, Jae-Young; Kim, CS; Lee, SU | CONFERENCE | 37 |
2013 | 3D Path finder methodology for the design of 3DICs and interposers | Swaminathan, Madhavan; Martin, Bill; Han, Ki Jin | CONFERENCE | 40 |
2018-07-04 | 3상 DAB 컨버터의 경부하 효율 향상을 위한 스위칭 알고리즘 연구 | 최현준; 이준영; 심주영; 정지훈 | CONFERENCE | 46 |
2016-07-15 | 3상 교류 전동기 프레임의 전자기 방사 잡음 차폐효과 분석 | 조혁준; 한기진 | CONFERENCE | 27 |
2013-10-11 | 3차원 포인트 모델의 스무딩된 법선 매핑 | 이효기; 남진우; Sim, Jae-Young | CONFERENCE | 26 |
2011-09-01 | 3차원 포인트 모델의 히스토그램 정규화 | 남진우; Sim, Jae-Young | CONFERENCE | 26 |
2003-11-16 | 4-PAM/20Gbps Transmission over 20-in FR-4 Backplane Channels: Channel Characterization and System Implementation | Bien, Franklin; None; None; None; None; None; None | CONFERENCE | 46 |