Strong Fermi-level Pinning Driven by Epitaxial Graphene Interlayer in Metal/4H-SiC Junction

Abstract

Fermi-level pinning is a phenomenon that the Schottky barrier of metal/semiconductor junction exhibits weak dependence on the metal work-function. According to the previous study [1], the metal/graphene/Si junction exhibits strong Fermi-level pinning which is expected on an ideal metal/Si junction. It has been reported that the Fermi-level pinning of metal/SiC junction is relatively weak compared with the metal/Si junction due to the ionicity between atomic elements of crystalline structure [2]. With this background, we investigated the Fermi-level pinning in metal/graphene/4H-SiC junctions. The junction was fabricated by first epitaxially growing graphene on a 4H-SiC substrate with the metal-capping method under UHV environment [3] and then depositing circular metal (Al, Ni, Pt) electrodes onto the grown graphene layer. The Fermi-level pinning factor S was extracted from current-voltage (I-V) and capacitance-voltage (C-V) curves, signifying strong Fermi-level pinning. A theoretical model proposed by Kopylov et al. describing the charge transfer at the graphene/SiC interface provides a plausible explanation for the observed strong Fermi-level pinning [4]. [1]Hoon Hahn Yoon et al., Nano Letters 17(1), 44 (2017) [2] Stephen Kurtin, T. C. McGill, and C. A. Mead, Physical Review Letters 22, 1433 (1969) [3] Han Byul Jin et al.,Scientific Reports 5, 9615 (2015) [4] Sergey Kopylov et al., Applied Physics Letters 97, 112109 (2010)