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- Kim, Kyung Rok
- Nano-Electronic Emerging Devices Lab.
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| DC Field | Value | Language |
|---|---|---|
| dc.citation.conferencePlace | KO | - |
| dc.citation.title | 제32회 한국반도체학술대회 | - |
| dc.contributor.author | Lee, Kwan Yong | - |
| dc.contributor.author | Kim, Woo-Seok | - |
| dc.contributor.author | Yeo, Sang Hun | - |
| dc.contributor.author | Jang, In Jun | - |
| dc.contributor.author | Choi, Young-Eun | - |
| dc.contributor.author | Kimm, Myoung | - |
| dc.contributor.author | Jeong, Yesong | - |
| dc.contributor.author | Park, Jun Young | - |
| dc.contributor.author | 류민우 | - |
| dc.contributor.author | Kim, Kyung Rok | - |
| dc.date.accessioned | 2026-01-06T18:59:59Z | - |
| dc.date.available | 2026-01-06T18:59:59Z | - |
| dc.date.created | 2026-01-06 | - |
| dc.date.issued | 2025-02-14 | - |
| dc.identifier.bibliographicCitation | 제32회 한국반도체학술대회 | - |
| dc.identifier.uri | https://scholarworks.unist.ac.kr/handle/201301/89884 | - |
| dc.publisher | 한국반도체협회 | - |
| dc.title | Process Variation Tolerant 28-nm Ternary CMOS Technology with Gate-Inderlap Enginnering | - |
| dc.type | Conference Paper | - |
| dc.date.conferenceDate | 2025-02-12 | - |
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