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- Kim, Jae Joon
- Circuits & Systems Design Lab.
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.assignee | 울산과학기술원 | - |
| dc.contributor.author | 김재준 | - |
| dc.contributor.author | 조정훈 | - |
| dc.contributor.author | 김현중 | - |
| dc.contributor.author | 김용기 | - |
| dc.contributor.author | 편유장 | - |
| dc.date.accessioned | 2025-12-16T14:35:33Z | - |
| dc.date.application | 2024-06-10 | - |
| dc.date.available | 2025-12-16T14:35:33Z | - |
| dc.date.registration | 2025-11-10 | - |
| dc.identifier.patentApplicationNumber | 10-2024-0074930 | - |
| dc.identifier.patentRegistrationNumber | 10-2885665 | - |
| dc.identifier.uri | https://scholarworks.unist.ac.kr/handle/201301/89085 | - |
| dc.title | 삼진 신경망을 이용한 연산 장치 및 연산 방법, 삼진 신경망을 이용한 연산 장치를 포함하는 아날로그 신호 분석 시스템 | - |
| dc.type | Patent | - |
| dc.publisher.country | KO | - |
| dc.type.iprs | 특허 | - |
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