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Woo, Kyung Seok
Emerging Semiconductor Technology Laboratory
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Implementation of Bayesian networks and Bayesian inference using a Cu0.1Te0.9/HfO2/Pt threshold switching memristor

Author(s)
Baek, In KyungLee, Soo HyungJang, Yoon HoPark, HyungjunKim, JaehyunCheong, SunwooShim, Sung KeunHan, JangukHan, Joon-KyuJeon, Gwang SikShin, Dong HoonWoo, Kyung SeokHwang, Cheol Seong
Issued Date
2024-05
DOI
10.1039/d3na01166f
URI
https://scholarworks.unist.ac.kr/handle/201301/87682
Citation
NANOSCALE ADVANCES, v.6, no.11, pp.2892 - 2902
Abstract
Bayesian networks and Bayesian inference, which forecast uncertain causal relationships within a stochastic framework, are used in various artificial intelligence applications. However, implementing hardware circuits for the Bayesian inference has shortcomings regarding device performance and circuit complexity. This work proposed a Bayesian network and inference circuit using a Cu0.1Te0.9/HfO2/Pt volatile memristor, a probabilistic bit neuron that can control the probability of being 'true' or 'false.' Nodal probabilities within the network are feasibly sampled with low errors, even with the device's cycle-to-cycle variations. Furthermore, Bayesian inference of all conditional probabilities within the network is implemented with low power (<186 nW) and energy consumption (441.4 fJ), and a normalized mean squared error of similar to 7.5 x 10(-4) through division feedback logic with a variational learning rate to suppress the inherent variation of the memristor. The suggested memristor-based Bayesian network shows the potential to replace the conventional complementary metal oxide semiconductor-based Bayesian estimation method with power efficiency using a stochastic computing method.
Publisher
ROYAL SOC CHEMISTRY
ISSN
2516-0230
Keyword
COPPERTRANSPORTMEMORIES

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