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| DC Field | Value | Language |
|---|---|---|
| dc.citation.endPage | 879 | - |
| dc.citation.number | 5 | - |
| dc.citation.startPage | 876 | - |
| dc.citation.title | IEEE ELECTRON DEVICE LETTERS | - |
| dc.citation.volume | 46 | - |
| dc.contributor.author | Hong, Giyong | - |
| dc.contributor.author | Huh, In | - |
| dc.contributor.author | You, Joo Hyung | - |
| dc.contributor.author | Choe, Jae Myung | - |
| dc.contributor.author | Kim, Younggu | - |
| dc.contributor.author | Jeong, Changwook | - |
| dc.date.accessioned | 2025-06-04T17:00:00Z | - |
| dc.date.available | 2025-06-04T17:00:00Z | - |
| dc.date.created | 2025-06-04 | - |
| dc.date.issued | 2025-05 | - |
| dc.description.abstract | Machine Learning (ML)-based compact modeling provides a promising alternative to traditional physics-based methods, enabling faster development of compact models for novel devices while offering improved predictive performance. For Resistive Random Access Memory (RRAM) devices, several ML-based compact models have been developed. However, these models often face two key challenges: they fail to capture stochastic cycle-to-cycle variations effectively, and they are difficult to accurately convert into Verilog-A models for SPICE simulations. To address these challenges, we propose a novel variation-aware ML-based compact model for RRAM, using modified deep ensemble techniques to account for cycle-to-cycle variations and model uncertainty, along with a newly designed state determination function to accurately capture resistive switching characteristics. Furthermore, by introducing knowledge distillation combined with a pruning-retraining process, the proposed model achieves a 67% reduction in simulation turnaround time while maintaining predictive accuracy, ensuring strong compatibility with SPICE simulations. | - |
| dc.identifier.bibliographicCitation | IEEE ELECTRON DEVICE LETTERS, v.46, no.5, pp.876 - 879 | - |
| dc.identifier.doi | 10.1109/LED.2025.3545909 | - |
| dc.identifier.issn | 0741-3106 | - |
| dc.identifier.scopusid | 2-s2.0-85219569098 | - |
| dc.identifier.uri | https://scholarworks.unist.ac.kr/handle/201301/87170 | - |
| dc.identifier.wosid | 001482876000004 | - |
| dc.language | 영어 | - |
| dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
| dc.title | ML-Driven Compact Models for RRAMs: Addressing Variability and Simulation Efficiency | - |
| dc.type | Article | - |
| dc.description.isOpenAccess | FALSE | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
| dc.relation.journalResearchArea | Engineering | - |
| dc.type.docType | Article | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.subject.keywordAuthor | Uncertainty | - |
| dc.subject.keywordAuthor | Voltage | - |
| dc.subject.keywordAuthor | Training | - |
| dc.subject.keywordAuthor | Accuracy | - |
| dc.subject.keywordAuthor | Integrated circuit modeling | - |
| dc.subject.keywordAuthor | Data models | - |
| dc.subject.keywordAuthor | SPICE | - |
| dc.subject.keywordAuthor | Predictive models | - |
| dc.subject.keywordAuthor | Resistance | - |
| dc.subject.keywordAuthor | Stochastic processes | - |
| dc.subject.keywordAuthor | RRAM | - |
| dc.subject.keywordAuthor | variability modeling | - |
| dc.subject.keywordAuthor | model compression | - |
| dc.subject.keywordAuthor | circuit simulation | - |
| dc.subject.keywordAuthor | machine learning | - |
| dc.subject.keywordAuthor | compact model | - |
| dc.subject.keywordPlus | NETWORK | - |
| dc.subject.keywordPlus | STATISTICS | - |
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