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dc.contributor.advisor Bien, Franklin -
dc.contributor.author Lee, Woorim -
dc.date.accessioned 2025-04-04T13:48:51Z -
dc.date.available 2025-04-04T13:48:51Z -
dc.date.issued 2025-02 -
dc.description.abstract This paper presents an innovative design for an active rectifier tailored specifically for Implantable Medical Devices (IMDs), where miniaturization and high efficiency are critical. By using a 40.68MHz operating frequency, the proposed system minimizes the size of passive components, allowing for a more compact overall system. However, this high-frequency operation introduces significant challenges, particularly in compensating for ON/OFF delays in the rectification process. Without adequate delay compensation, these delays can lead to suboptimal switching, causing increased power loss and reduced system efficiency. To address these issues, I introduce a novel Ramp-based Phase Locked Loop (RPLL) architecture, which effectively combines the advantages of the Pulse Width Modulation (PWM) method commonly used in DC-DC converters with the control precision of a Phase Locked Loop (PLL). This hybrid RPLL approach not only mitigates the ON/OFF delay but also provides a more stable and efficient switching mechanism. By reducing these delays, the RPLL significantly improves the Power Conversion Efficiency (PCE) and Voltage Conversion Ratio (VCR) of the rectifier, enabling it to meet the stringent power requirements of IMDs. The entire system is designed and fabricated using the standard 0.18 µm CMOS process, ensuring compatibility with existing manufacturing processes while keeping power consumption within acceptable limits for implantable applications. Through Cadence simulations, the proposed rectifier architecture demonstrates a peak PCE of 90.3%, indicating highly efficient power transfer, and a maximum VCR of 98.0%, which closely matches the input-output voltage ratio. -
dc.description.degree Master -
dc.description Department of Electrical Engineering -
dc.identifier.uri https://scholarworks.unist.ac.kr/handle/201301/86423 -
dc.identifier.uri http://unist.dcollection.net/common/orgView/200000865364 -
dc.language ENG -
dc.publisher Ulsan National Institute of Science and Technology -
dc.subject 40.68MHz Active Rectifier -
dc.subject PLL -
dc.subject PWM -
dc.subject ON-OFF delay compensation -
dc.title A 40.68MHz Active Rectifier using PLL and PWM control of DC-DC converter for ON-OFF delay compensation -
dc.type Thesis -

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