Negative Fermi-level Pinning Effect Induced by Graphene Interlayer in Metal/Graphene/Semiconductor Junction

Abstract

We report the direct observation revealing that the electric dipole layer originating from the off-centric distribution of interacting electrons at metal/graphene interface can induce the negative Fermi-level pinning effect in metal/graphene/semiconductor junction made on a semiconductor substrate containing regions with low interface-trap density. The graphene interlayer takes a role of diffusion barrier preventing the atomic intermixing at interface and preserving the low interface-trap density region. The change of electrostatic potential across the metal/graphene interface due to the interaction dipole layer and the doping of graphene is found to cause the negative Fermi-level pinning effect‚ supported by the Schottky barrier decreasing as metal work-function increasing. In case of metal/graphene/GaAs junction‚ the local small patches with very thin or no native oxide layer are considered to be responsible for the negative Fermi-level pinning. In the prevailing region with normal native oxides surrounding the small patches‚ the Fermi-level pinning appears to be strong. Meanwhile‚ the negative Fermi-level pinning is found to occur globally in metal/graphene/SiC junction where the SiC substrate is known to produce a low density of interface traps. This work provides an experimental method to form Schottky and Ohmic-like contacts simultaneously on a semiconductor substrate covered partially with graphene by using identical metal electrodes.