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DC Field | Value | Language |
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dc.citation.endPage | 1624 | - |
dc.citation.number | 9 | - |
dc.citation.startPage | 1614 | - |
dc.citation.title | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | - |
dc.citation.volume | 26 | - |
dc.contributor.author | Gupta, Puneet | - |
dc.contributor.author | Kahng, Andrew B. | - |
dc.contributor.author | Kim, Youngmin | - |
dc.contributor.author | Sylvester, Dennis | - |
dc.date.accessioned | 2023-12-22T09:10:37Z | - |
dc.date.available | 2023-12-22T09:10:37Z | - |
dc.date.created | 2014-10-28 | - |
dc.date.issued | 2007-09 | - |
dc.description.abstract | Critical dimension (CD) variation caused by defocus is largely systematic with dense lines "smiling"" through focus while isolated lines frown." In this paper, we propose a new design methodology that allows explicit compensation of focus-dependent CD variation, in particular, either within a cell (self-compensated cells) or across cells in a critical path (self-compensated design). By creating iso and dense variants for each library cell, we can achieve designs that are more robust to focus variation. Optimization with a mixture of dense and iso cell variants is possible, both for area and leakage power in timing constraints (critical delay), with the latter an interesting complement to existing leakage-reduction techniques, such as dual-Vth. We implement both a heuristic and mixed-integer linear-programming (MILP) solution methods to address this optimization and experimentally compare their results. Results indicate that designing with a self-compensated cell library incurs 12% area penalty and 6% leakage increase over a baseline library while compensating for focus-dependent CD variation (i.e., the design meets timing constraints across a large range of focus variation). We observe 27% area penalty and 7% leakage increase at the worst case defocus condition using only single-pitch cells. The area penalty of circuits after using both the heuristic and MILP optimization approaches is reduced to 3% while maintaining timing. We also apply the optimization to leakage, which traditionally shows very large variability due to its exponential relationship with gate CD. We conclude that a mixed iso/dense library that is combined with a sensitivity-based optimization approach yields much better area/timing/leakage tradeoffs than using a self-compensated cell library alone. Selfcompensated designs show 25% less leakage power on average at the worst defoeus condition compared to a design employing a conventional library for the benchmarks studied. | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.26, no.9, pp.1614 - 1624 | - |
dc.identifier.doi | 10.1109/TCAD.2007.895759 | - |
dc.identifier.issn | 0278-0070 | - |
dc.identifier.scopusid | 2-s2.0-34548212402 | - |
dc.identifier.uri | https://scholarworks.unist.ac.kr/handle/201301/7891 | - |
dc.identifier.url | http://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=34548212402 | - |
dc.identifier.wosid | 000249309200007 | - |
dc.language | 영어 | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | Self-compensating design for reduction of timing and leakage sensitivity to systematic pattern-dependent variation | - |
dc.type | Article | - |
dc.description.journalRegisteredClass | scopus | - |
dc.subject.keywordAuthor | across-chip linewidth variation (ACLV) | - |
dc.subject.keywordAuthor | design for manufacturability | - |
dc.subject.keywordAuthor | focus | - |
dc.subject.keywordAuthor | leakage | - |
dc.subject.keywordAuthor | self-compensating | - |
dc.subject.keywordAuthor | systematic variation | - |
dc.subject.keywordPlus | GATE | - |
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