dc.citation.conferencePlace |
US |
- |
dc.citation.conferencePlace |
San Francisco, CA, USA |
- |
dc.citation.title |
IEEE International Solid-State Circuits Conference |
- |
dc.contributor.author |
Lim, Younghyun |
- |
dc.contributor.author |
Kim, Juyeop |
- |
dc.contributor.author |
Jo, Yongwoo |
- |
dc.contributor.author |
Bang, Jooeun |
- |
dc.contributor.author |
Yoo, Seyeon |
- |
dc.contributor.author |
Park, Hangi |
- |
dc.contributor.author |
Yoon, Heein |
- |
dc.contributor.author |
Choi, Jaehyouk |
- |
dc.date.accessioned |
2024-01-31T23:07:43Z |
- |
dc.date.available |
2024-01-31T23:07:43Z |
- |
dc.date.created |
2022-03-10 |
- |
dc.date.issued |
2020-02-16 |
- |
dc.identifier.bibliographicCitation |
IEEE International Solid-State Circuits Conference |
- |
dc.identifier.doi |
10.1109/isscc19947.2020.9062921 |
- |
dc.identifier.scopusid |
2-s2.0-85083827488 |
- |
dc.identifier.uri |
https://scholarworks.unist.ac.kr/handle/201301/78586 |
- |
dc.publisher |
IEEE |
- |
dc.title |
A 170MHz-Lock-In-Range and −253dB-FoMjitter 12-to-14.5GHz Subsampling PLL with a 150µW Frequency-Disturbance-Correcting Loop Using a Low-Power Unevenly Spaced Edge Generator |
- |
dc.type |
Conference Paper |
- |
dc.date.conferenceDate |
2020-02-16 |
- |