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- Kwon, Jimin
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| DC Field | Value | Language |
|---|---|---|
| dc.citation.conferencePlace | US | - |
| dc.citation.conferencePlace | San Francisco | - |
| dc.citation.endPage | 25.4.4 | - |
| dc.citation.startPage | 25.4.1 | - |
| dc.citation.title | IEEE International Electron Devices Meeting | - |
| dc.contributor.author | Radway, R. M. | - |
| dc.contributor.author | Sethi, K. | - |
| dc.contributor.author | Chen, W. C. | - |
| dc.contributor.author | Kwon, Jimin | - |
| dc.contributor.author | Liu, S. | - |
| dc.contributor.author | Wu, T. F. | - |
| dc.contributor.author | Beigne, E. | - |
| dc.contributor.author | Shulaker, M. M. | - |
| dc.contributor.author | Wong, H. S.P. | - |
| dc.contributor.author | Mitra, S. | - |
| dc.date.accessioned | 2024-01-31T21:06:10Z | - |
| dc.date.available | 2024-01-31T21:06:10Z | - |
| dc.date.created | 2022-08-29 | - |
| dc.date.issued | 2021-12-11 | - |
| dc.description.abstract | The next leap in computing performance requires the next leap in integration. Just as integrated circuits brought together discrete components, this next level of integration must seamlessly fuse disparate parts of a system - e.g., compute, memory, inter-chip connections - synergistically for large energy and execution time benefits. We present this vision, its challenges, and discuss recent advances at the technology, architecture, and system levels. | - |
| dc.identifier.bibliographicCitation | IEEE International Electron Devices Meeting, pp.25.4.1 - 25.4.4 | - |
| dc.identifier.doi | 10.1109/IEDM19574.2021.9720647 | - |
| dc.identifier.scopusid | 2-s2.0-85126945874 | - |
| dc.identifier.uri | https://scholarworks.unist.ac.kr/handle/201301/76435 | - |
| dc.language | 영어 | - |
| dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
| dc.title | The Future of Hardware Technologies for Computing: N3XT 3D MOSAIC, Illusion Scaleup, Co-Design | - |
| dc.type | Conference Paper | - |
| dc.date.conferenceDate | 2021-12-11 | - |
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