dc.citation.conferencePlace |
ZZ |
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dc.citation.title |
Design Automation and Test in Europe Conference |
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dc.contributor.author |
Oh, Hyunyoung |
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dc.contributor.author |
Hwang, Dongil |
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dc.contributor.author |
Malenko, Maja |
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dc.contributor.author |
Cho, Myunghyun |
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dc.contributor.author |
Moon, Hyungon |
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dc.contributor.author |
Baunach, Marcel |
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dc.contributor.author |
Paek, Yunheung |
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dc.date.accessioned |
2024-01-31T20:40:05Z |
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dc.date.available |
2024-01-31T20:40:05Z |
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dc.date.created |
2022-03-25 |
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dc.date.issued |
2022-03-22 |
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dc.description.abstract |
We propose XtenStore, a system that extends the existing SGX-based secure in-memory key-value store with an external hardware accelerator in order to ensure comparable security guarantees with lower performance degradation. The accelerator is implemented on a commodity FPGA card that is readily connected with the x86 CPU via PCIe interconnect to form a hybrid x86-FPGA system. In comparison to the prior SGX-based work, XtenStore improves the throughput by 4-33x, and exhibits considerably shorter tail latency (>23x, 99th-percentile). |
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dc.identifier.bibliographicCitation |
Design Automation and Test in Europe Conference |
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dc.identifier.uri |
https://scholarworks.unist.ac.kr/handle/201301/76292 |
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dc.identifier.url |
https://ieeexplore.ieee.org/document/9774583 |
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dc.language |
영어 |
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dc.publisher |
EDA Consortium |
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dc.title |
XtenStore: Fast Shielded In-memory Key-Value Store on a Hybrid x86-FPGA System |
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dc.type |
Conference Paper |
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dc.date.conferenceDate |
2022-03-14 |
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