dc.contributor.advisor |
Lee, Kyuho |
- |
dc.contributor.author |
Seong, Taeho |
- |
dc.date.accessioned |
2024-01-29T14:47:48Z |
- |
dc.date.available |
2024-01-29T14:47:48Z |
- |
dc.date.issued |
2022-02 |
- |
dc.description.degree |
Doctor |
- |
dc.description |
Department of Electrical Engineering |
- |
dc.identifier.uri |
https://scholarworks.unist.ac.kr/handle/201301/73655 |
- |
dc.identifier.uri |
http://unist.dcollection.net/common/orgView/200000602845 |
- |
dc.language |
eng |
- |
dc.publisher |
Ulsan National Institute of Science and Technology (UNIST) |
- |
dc.rights.embargoReleaseDate |
9999-12-31 |
- |
dc.rights.embargoReleaseTerms |
9999-12-31 |
- |
dc.subject |
Phase Locked Loop, Digital Phase Locked Loop, 5G |
- |
dc.title |
Low-Jitter, Low-Fractional-Spur and Low-Reference-Spur Ring-Oscillator Based Digital Fractional-N PLL |
- |
dc.type |
Thesis |
- |