File Download

  • Find it @ UNIST can give you direct access to the published full text of this article. (UNISTARs only)

Views & Downloads

Detailed Information

Cited time in webofscience Cited time in scopus
Metadata Downloads

Measurement and Analysis of Electromagnetic Field, Noise and IC Logic Error due to system-level ESD

Author(s)
Park, Myungjoon
Advisor
Kim, Jingook
Issued Date
2017-08
URI
https://scholarworks.unist.ac.kr/handle/201301/72222 http://unist.dcollection.net/jsp/common/DcLoOrgPer.jsp?sItemId=000002380832
Abstract
As the high performance very-large-scale integration (VLSI) systems operate with high speed and low voltage, the system-level electrostatic discharge (ESD) event is becoming one of the important noise sources causing logic errors and system malfunctions such as system reboot or fault. To understand the ESD noise phenomena and improve the system-level ESD noise immunity for devices, the accurate ESD noise measurement and analysis of IC logic errors are necessary.
Section I is written for the tendency of ESD research and previous research. This paper presents the noise type correlation by measuring the signal-ground noise and power-ground noise simultaneously on the fundamental F/F operation circuit and shows the type of error from chip, in section II. Furthermore, the decoupling capacitors (de-cap) effect that can reduce the error occurrence by checking the error rate are analyzed. A generator is designed on the main board which is based on real operating laptop, and the chip on dual in-line memory module (DIMM) is also designed to perform the basic F/F operation. The clock and data input from generator are connected to the chip on the DIMM through the small outline dual in-line memory module (SODIMM) socket. ESD occurs at the corner of the ground plane of main board. The specification of the ESD generator satisfies IEC 61000-4-2 [1]. The ESD current flows along the ground strap, and affects the DIMM. IN-ground, CLK-ground, OUT-ground and power-ground on the DIMM are simultaneously measured to determine the effect of ESD on the main board. To analyze the error ratio according to the ESD voltage level, the voltage setup of the ESD gun is 3kV, 5kV and 8kV. To investigate the effects of chip shielding and DIMM de-caps on the error probability of DIMM, the experiment is conducted under the several conditions. After confirming the normal operation for each condition, the error type on the DIMM due to the ESD occurred in the circuit is analyzed and the statistics are shown. The results are verified by H-spice simulation, Vector Network Analyzer (VNA) and HFSS simulation. In order to obtain the improvement method of the DIMM immunity, experiments are conducted to find out the effective position and number of DIMM de-cap.
Accurate measurements of electromagnetic fields are also essential to analyze the radiated noise due to unwanted electrostatic discharge (ESD) events at electronic devices. Usually, to know the radiated noise by ESD events, the voltages induced at field probes are measured, and the fields are obtained from the voltage by de-convolving the probe factor. In section Ⅲ, the two probe-factor deconvolution methods are investigated and compared in the measurements of the fields induced by system-level ESD events.
Publisher
Ulsan National Institute of Science and Technology (UNIST)
Degree
Master
Major
Department of Electrical Engineering

qrcode

Items in Repository are protected by copyright, with all rights reserved, unless otherwise indicated.