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DC Field | Value | Language |
---|---|---|
dc.citation.endPage | 705 | - |
dc.citation.number | 9 | - |
dc.citation.startPage | 701 | - |
dc.citation.title | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | - |
dc.citation.volume | 61 | - |
dc.contributor.author | Seong, Taeho | - |
dc.contributor.author | Lee, Yongsun | - |
dc.contributor.author | Choi, Jaehyouk | - |
dc.date.accessioned | 2023-12-22T02:13:00Z | - |
dc.date.available | 2023-12-22T02:13:00Z | - |
dc.date.created | 2014-10-10 | - |
dc.date.issued | 2014-09 | - |
dc.description.abstract | oraclA new design methodology is proposed for an ultralow in-band phase noise injection-locked frequency multiplier (ILFM) based on open-loop frequency calibration. The prototype ILFM was designed and fabricated in the 65-nm CMOS process. Using an open-loop calibrator without a real-time monitoring loop, the ILFM achieved excellent in-band phase noise with low power consumption and a small silicon area. Following the design procedure based on the phase noise analysis, the proposed ILFM showed that the open-loop calibrator was capable of overcoming phase noise degradation due to process-voltage-temperature variations. The output frequency was 3.0 GHz when the oscillator was injection locked by the 15th harmonic of the 200-MHz reference clock. The in-band phase noise performance was -117.0, -122.6, and -124.5 dBc/Hz at 10-, 100-, and 1-MHz offsets, respectively. The total active area was 0.19 mm(2), and the power consumption was 8.1 mW. | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.61, no.9, pp.701 - 705 | - |
dc.identifier.doi | 10.1109/TCSII.2014.2335435 | - |
dc.identifier.issn | 1549-7747 | - |
dc.identifier.scopusid | 2-s2.0-84930641158 | - |
dc.identifier.uri | https://scholarworks.unist.ac.kr/handle/201301/7102 | - |
dc.identifier.wosid | 000341985600013 | - |
dc.language | 영어 | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | Ultralow In-Band Phase Noise Injection-Locked Frequency Multiplier Design Based on Open-Loop Frequency Calibration | - |
dc.type | Article | - |
dc.description.isOpenAccess | FALSE | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalResearchArea | Engineering | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
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