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김재준

Kim, Jae Joon
Circuits & Systems Design Lab.
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DC Field Value Language
dc.contributor.assignee 울산과학기술원 -
dc.contributor.author 이광묵 -
dc.contributor.author 김재준 -
dc.date.accessioned 2024-01-23T18:09:30Z -
dc.date.application 2018-12-07 -
dc.date.available 2024-01-23T18:09:30Z -
dc.date.registration 2020-06-23 -
dc.identifier.patentApplicationNumber 10-2018-0157342 -
dc.identifier.patentRegistrationNumber 10-2128024 -
dc.identifier.uri https://scholarworks.unist.ac.kr/handle/201301/69648 -
dc.title 리플을 저감하는 저항 감지 장치 및 방법 -
dc.type Patent -
dc.publisher.country KO -
dc.type.iprs 특허 -

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