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DC Field | Value | Language |
---|---|---|
dc.citation.endPage | 1280 | - |
dc.citation.number | 8 | - |
dc.citation.startPage | 1277 | - |
dc.citation.title | IEEE ELECTRON DEVICE LETTERS | - |
dc.citation.volume | 40 | - |
dc.contributor.author | Kwon, Jimin | - |
dc.contributor.author | Matsui, Hiroyuki | - |
dc.contributor.author | Kim, Woojo | - |
dc.contributor.author | Tokito, Shizuo | - |
dc.contributor.author | Jung, Sungjune | - |
dc.date.accessioned | 2023-12-21T18:47:42Z | - |
dc.date.available | 2023-12-21T18:47:42Z | - |
dc.date.created | 2022-08-29 | - |
dc.date.issued | 2019-08 | - |
dc.description.abstract | A dual-gate configuration has been introduced to organic thin-film transistors (TFTs) for full-depletion behavior to enhance the transconductance, subthreshold slope, and drain current on-off ratio. In this letter, we show how those dual-gate effects influence the static and dynamic responses of three-dimensional (3-D) complementary organic logic gates in comparison to their single-gate counterpart. For the comparative study, 3-D inverters and ring oscillators were fabricated by printing directly on plastic foil in both single-and dual-gate configurations. In the static inverter operation, the fully depleted characteristics of the dual-gate TFTs lead to an increase in voltage gain and a dramatic decrease in standby power consumption. In the dynamic ring oscillator operation, the two configurations have comparable gate delays because the use of an additional gate increases not only the drain current but also the load input gate capacitance. Our findings demonstrate the performance of an inverter that can represent the overall operation of complementary logic gates consisting of pull-up and pull-down networks, thereby providing significant insight into the printed organic TFT circuit design using dual gating effects. | - |
dc.identifier.bibliographicCitation | IEEE ELECTRON DEVICE LETTERS, v.40, no.8, pp.1277 - 1280 | - |
dc.identifier.doi | 10.1109/LED.2019.2922296 | - |
dc.identifier.issn | 0741-3106 | - |
dc.identifier.scopusid | 2-s2.0-85069842879 | - |
dc.identifier.uri | https://scholarworks.unist.ac.kr/handle/201301/59189 | - |
dc.identifier.wosid | 000477722800013 | - |
dc.language | 영어 | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | Static and Dynamic Response Comparison of Printed, Single- and Dual-Gate 3-D Complementary Organic TFT Inverters | - |
dc.type | Article | - |
dc.description.isOpenAccess | FALSE | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalResearchArea | Engineering | - |
dc.type.docType | Article | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.subject.keywordAuthor | Thin film transistors | - |
dc.subject.keywordAuthor | flexible electronics | - |
dc.subject.keywordAuthor | inkjet printing | - |
dc.subject.keywordAuthor | gate delay | - |
dc.subject.keywordAuthor | full-depletion | - |
dc.subject.keywordPlus | LOW-VOLTAGE | - |
dc.subject.keywordPlus | CIRCUITS | - |
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