There are no files associated with this item.
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.citation.endPage | 245 | - |
dc.citation.startPage | 217 | - |
dc.citation.title | ADVANCES IN COMPUTERS | - |
dc.citation.volume | 122 | - |
dc.contributor.author | Lee, Kyuho Jason | - |
dc.date.accessioned | 2023-12-21T16:08:40Z | - |
dc.date.available | 2023-12-21T16:08:40Z | - |
dc.date.created | 2022-06-21 | - |
dc.date.issued | 2021-03 | - |
dc.description.abstract | Deep Neural Networks (DNNs) have become a promising solution to inject AI in our daily lives from self-driving cars, smartphones, games, drones, etc. In most cases, DNNs were accelerated by server equipped with numerous computing engines, e.g., GPU, but recent technology advance requires energy-efficient acceleration of DNNs as the modern applications moved down to mobile computing nodes. Therefore, Neural Processing Unit (NPU) architectures dedicated to energy-efficient DNN acceleration became essential. Despite the fact that training phase of DNN requires precise number representations, many researchers proved that utilizing smaller bit-precision is enough for inference with low-power consumption. This led hardware architects to investigate energy-efficient NPU architectures with diverse HW-SW co-optimization schemes for inference. This chapter provides a review of several design examples of latest NPU architecture for DNN, mainly about inference engines. It also provides a discussion on the new architectural researches of neuromorphic computers and processing-in-memory architecture, and provides perspectives on the future research directions. | - |
dc.identifier.bibliographicCitation | ADVANCES IN COMPUTERS, v.122, pp.217 - 245 | - |
dc.identifier.doi | 10.1016/bs.adcom.2020.11.001 | - |
dc.identifier.issn | 0065-2458 | - |
dc.identifier.scopusid | 2-s2.0-85099518589 | - |
dc.identifier.uri | https://scholarworks.unist.ac.kr/handle/201301/58708 | - |
dc.identifier.url | https://www.sciencedirect.com/science/article/pii/S0065245820300887 | - |
dc.identifier.wosid | 000750143400008 | - |
dc.language | 영어 | - |
dc.publisher | ACADEMIC PRESS INC ELSEVIER SCIENCE | - |
dc.title | Architecture of neural processing unit for deep neural networks | - |
dc.type | Article | - |
dc.description.isOpenAccess | FALSE | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Artificial Intelligence;Computer Science, Hardware & Architecture | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.type.docType | Article | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.subject.keywordAuthor | Artificial intelligence system-on-chip | - |
dc.subject.keywordAuthor | Deep neural network | - |
dc.subject.keywordAuthor | Neural processing unit | - |
dc.subject.keywordAuthor | VLSI circuits | - |
dc.subject.keywordAuthor | Deep learning processor | - |
Items in Repository are protected by copyright, with all rights reserved, unless otherwise indicated.
Tel : 052-217-1404 / Email : scholarworks@unist.ac.kr
Copyright (c) 2023 by UNIST LIBRARY. All rights reserved.
ScholarWorks@UNIST was established as an OAK Project for the National Library of Korea.