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Jeong, Changwook
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dc.citation.conferencePlace CH -
dc.citation.conferencePlace Hsinchu -
dc.citation.endPage 40 -
dc.citation.startPage 39 -
dc.citation.title International Symposium on VLSI Technology -
dc.contributor.author Park, J. H. -
dc.contributor.author Jeong, W. C. -
dc.contributor.author Oh, J. H. -
dc.contributor.author Jeong, Changwook -
dc.contributor.author Shin, J. M. -
dc.contributor.author Hwang, Y. N. -
dc.contributor.author Ahn, S. J. -
dc.contributor.author Lee, S. H. -
dc.contributor.author Lee, S. Y. -
dc.contributor.author Ryoo, K. C. -
dc.contributor.author Park, Jonghyun -
dc.contributor.author Yang, F. -
dc.contributor.author Koh, G. H. -
dc.contributor.author Jeong, G. T. -
dc.contributor.author Jeong, H. S. -
dc.contributor.author Kim, Kinam -
dc.date.accessioned 2023-12-20T05:36:51Z -
dc.date.available 2023-12-20T05:36:51Z -
dc.date.created 2022-04-07 -
dc.date.issued 2005-04-25 -
dc.description.abstract We investigate the key factors for scalable high density MRAM. Specifically we examine problems such as large switching field, small sensing margin and writing disturbance following a decrease in size. We demonstrate these problems and suggest several solutions for realizing high density MRAM. © 2005 IEEE. -
dc.identifier.bibliographicCitation International Symposium on VLSI Technology, pp.39 - 40 -
dc.identifier.doi 10.1109/VTSA.2005.1497074 -
dc.identifier.scopusid 2-s2.0-27144532743 -
dc.identifier.uri https://scholarworks.unist.ac.kr/handle/201301/58539 -
dc.language 영어 -
dc.publisher IEEE -
dc.title Integration technologies for scalable high density MRAM -
dc.type Conference Paper -
dc.date.conferenceDate 2005-04-25 -

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