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Jeong, Changwook
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dc.citation.conferencePlace JA -
dc.citation.conferencePlace Kyoto -
dc.citation.endPage 97 -
dc.citation.startPage 96 -
dc.citation.title 2007 Symposium on VLSI Technology -
dc.contributor.author Kang, D.H. -
dc.contributor.author Kim, J.S. -
dc.contributor.author Kim, Y.R. -
dc.contributor.author Kim, Y.T. -
dc.contributor.author Lee, M.K. -
dc.contributor.author Jun, Y.J. -
dc.contributor.author Park, J.H. -
dc.contributor.author Yeung, F. -
dc.contributor.author Jeong, Changwook -
dc.contributor.author Yu, J. -
dc.contributor.author Kong, J.H. -
dc.contributor.author Ha, D.W. -
dc.contributor.author Song, S.A. -
dc.contributor.author Park, J. -
dc.contributor.author Park, Y.H. -
dc.contributor.author Song, Y.J. -
dc.contributor.author Eum, C.Y. -
dc.contributor.author Ryoo, K.C. -
dc.contributor.author Shin, J.M. -
dc.contributor.author Lim, D.W. -
dc.contributor.author Park, S.S. -
dc.contributor.author Kim, J.H. -
dc.contributor.author Park, W.I. -
dc.contributor.author Sim, K.R. -
dc.contributor.author Cheong, J.H. -
dc.contributor.author Oh, J.H. -
dc.contributor.author Kim, J.I. -
dc.contributor.author Oh, Y.T. -
dc.contributor.author Lee, K.W. -
dc.contributor.author Koh, S.P. -
dc.contributor.author Eun, S.H. -
dc.contributor.author Kim, N.B. -
dc.contributor.author Koh, G.H. -
dc.contributor.author Jeong, G.T. -
dc.contributor.author Jeong, H.S. -
dc.contributor.author Kim, K. -
dc.date.accessioned 2023-12-20T05:06:03Z -
dc.date.available 2023-12-20T05:06:03Z -
dc.date.created 2022-04-06 -
dc.date.issued 2007-06-12 -
dc.description.abstract Programming with larger current than optimized one is often preferable to ensure a good resistance distribution of high-resistive reset state in high-density phase-change random access memories because it is very effective to increase the resistance of cells to a target value. In this paper, we firstly report that this larger current writing may conversely degrade the reset distribution by reducing the resistance of normal cells via the partial crystallization of amorphous Ge2Sb2Te5 and this degradation can be suppressed by designing a novel cell structure with a heat dissipating layer. -
dc.identifier.bibliographicCitation 2007 Symposium on VLSI Technology, pp.96 - 97 -
dc.identifier.doi 10.1109/VLSIT.2007.4339741 -
dc.identifier.issn 0743-1562 -
dc.identifier.scopusid 2-s2.0-47249114806 -
dc.identifier.uri https://scholarworks.unist.ac.kr/handle/201301/58530 -
dc.language 영어 -
dc.publisher VLSIT 2007 -
dc.title Novel heat dissipating cell scheme for improving a reset distribution in a 512M Phase-change Random Access Memory (PRAM) -
dc.type Conference Paper -
dc.date.conferenceDate 2007-06-12 -

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