Vertically and laterally self-aligned double-layer of nanocrystals in nanopatterned dielectric layer for nanocrystal floating gate memory device

Abstract

The formation of vertically and laterally self-aligned double-layer of CdSe colloidal nanocrystals (NCs) in nanopatterned dielectric layer on Si substrate was demonstrated by repeating dip-coating process for NC deposition and atomic layer deposition (ALD) of Al 2O 3 layer. A nanopatterned-SiO 2/Si substrate was formed by patterning with self-assembled diblock copolymer. After the selective deposition of the 1 st NC layer inside SiO 2 nanopattern by dip-coating, an Al 2O 3 interdielectric layer and the 2 nd NC layer in Al 2O 3 nanopattern were sequentially deposited. The capacitance-voltage measurement of Al-gate/ALD-Al 2O 3(25nm)/2 nd-CdSe-NCs/ALD-Al 2O 3(2nm)/1 st-CdSe-NCs/nanopatterned-Si0 2(15nm)/p- Si substrate structure showed the flatband voltage shift resulting from the charging of NCs. ©The Electrochemical Society.