Selective Incorporation of Colloidal Nanocrystals in Nanopatterned SiO2 Layer for Nanocrystal Memory Device

Abstract

CdSe colloidal nanocrystals with a size of similar to 5 nm were selectively incorporated in SiO2 nanopatterns formed by a self-assembled diblock copolymer patterning through a simple dip-coating process. The selective incorporation was achieved by capillary force, which drives the nanocrystals into the patterns during solvent evaporation in dip-coating. The capacitor structures of an Al-gate/atomic layer deposition-Al2O3 (27 nm)/CdSe (5 nm)/patterned SiO2 (25 nm)/p-Si substrate were fabricated to characterize the charging/discharging behavior for a memory device. The flatband voltage shift was observed by a charge transport between the gate and the nanocrystals. It demonstrates the colloidal nanocrystal application to a memory device through selective incorporation in regularly ordered nanopatterns by a simple dip-coating process.