Vertically and Laterally Self-Aligned Double Layer of Nanocrystals in Nanopatterned Dielectric Layer for Nanocrystal Floating Gate Memory Device

Abstract

The formation of a vertically and laterally self-aligned double layer of CdSe colloidal nanocrystals (NCs) in a nanopatterned dielectric layer on Si substrate was demonstrated by a repeating dip-coating process for NC deposition and atomic layer deposition (ALD) of Al(2)O(3) layer. A nanopatterned SiO(2)/Si substrate was formed by patterning with a self-assembled diblock copolymer. After the selective deposition of the first NC layer inside the SiO(2) nanopattern by dip-coating, an Al(2)O(3) interdielectric layer and the second NC layer in the Al(2)O(3) nanopattern were sequentially deposited. The capacitance voltage measurement of an Al-gate/ALD-Al(2)O(3)(25 nm)/seconcl-CdSe-NCs/ALD-Al(2)O(3)(2 nm)/first-CdSe-NCs/nanopattemed-SiO(2)(15 nm)/p-Si substrate structure showed the flatband voltage shift through the charge transport between the gate and NCs. (C) 2010 The Electrochemical Society. [DOI: 10.1149/1.3479548] All rights reserved.