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Choi, Jaehyouk
Integrated Circuits and Systems Lab (ICSL)
Research Interests
  • RF/Analog/Mixed IC design, low power CMOS IC, wired/wireless TRX IC, clock generation IC


A wideband dual-mode LC-VCO with a switchable gate-biased active core

DC Field Value Language Yoon, Heein ko Lee, Yongsun ko Kim, Jae Joon ko Choi, Jaehyouk ko 2014-06-19T08:29:10Z - 2014-06-19 ko 2014-05 ko
dc.identifier.citation IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.61, no.5, pp.289 - 293 ko
dc.identifier.issn 1549-7747 ko
dc.identifier.uri -
dc.description.abstract A wideband inductance-capacitance voltage-controlled oscillator (VCO) with a gm-switching technique was designed and fabricated in the 65-nm CMOS process. With a switchable secondary gate-biased active core and a primary core, the VCO operates in two different modes. In the LF mode, in which switches turn on the secondary core, the increased start-up gain facilitates LF oscillation. In the HF mode, in which the switches isolate the secondary core from the primary core, the reduced capacitive loading allows for HF oscillation. In addition, since the gate bias of the secondary core transistors guarantees the high transconductance of the secondary core, the switch size can be minimized, which further extends the upper boundary of the oscillation frequency. The VCO achieved a 41\% frequency range, i.e., 3.36-5.1 GHz, and a phase noise of-123.1 dBc/Hz at an offset of 1 MHz from an output frequency of 4.21 GHz. The active silicon area was 0.24 mm2, and the power consumption was 8.7 mW at 5 GHz. ko
dc.description.statementofresponsibility close -
dc.language 영어 ko
dc.title A wideband dual-mode LC-VCO with a switchable gate-biased active core ko
dc.type ARTICLE ko
dc.identifier.scopusid 2-s2.0-84901309263 ko
dc.identifier.wosid 000336669600001 ko
dc.type.rims ART ko
dc.description.wostc 1 *
dc.description.scopustc 0 * 2015-05-06 * 2014-06-19 *
dc.identifier.doi 10.1109/TCSII.2014.2305216 ko
dc.identifier.url ko
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