dc.citation.conferencePlace |
KO |
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dc.citation.conferencePlace |
Ramada Plaza Jeju HotelJeju |
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dc.citation.endPage |
225 |
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dc.citation.startPage |
224 |
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dc.citation.title |
11th International SoC Design Conference, ISOCC 2014 |
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dc.contributor.author |
Jeong, Chanbok |
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dc.contributor.author |
Kim, Youngmin |
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dc.date.accessioned |
2023-12-19T23:08:39Z |
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dc.date.available |
2023-12-19T23:08:39Z |
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dc.date.created |
2015-07-01 |
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dc.date.issued |
2014-11-05 |
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dc.description.abstract |
In this paper, we implement the SHA-256 FPGA hardware module for the security protocol of the IEEE 1609.2 vehicle communication (VC). VC requires high-throughput and low-latency hardware architectures. For fast and efficient design, we exploit parallel structures for preprocessing and hash computation in SHA-256. The proposed design is im- plemented in Vertex-5 and verified for correct hash operation. As a result, we can achieve up to 179.08 MHz with 2796 slices. |
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dc.identifier.bibliographicCitation |
11th International SoC Design Conference, ISOCC 2014, pp.224 - 225 |
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dc.identifier.doi |
10.1109/ISOCC.2014.7087617 |
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dc.identifier.scopusid |
2-s2.0-84929431580 |
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dc.identifier.uri |
https://scholarworks.unist.ac.kr/handle/201301/46689 |
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dc.identifier.url |
https://ieeexplore.ieee.org/document/7087617 |
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dc.language |
영어 |
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dc.publisher |
11th International SoC Design Conference, ISOCC 2014 |
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dc.title |
Implementation of Efficient SHA-256 Hash Algorithm for Secure Vehicle Communication using FPGA |
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dc.type |
Conference Paper |
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dc.date.conferenceDate |
2014-11-03 |
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