dc.citation.conferencePlace |
KO |
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dc.citation.conferencePlace |
Gyeongju |
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dc.citation.title |
한국물리학회 가을 학술논문발표회 |
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dc.contributor.author |
Jung, Sungchul |
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dc.contributor.author |
Kim, Junhyoung |
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dc.contributor.author |
Yoon, Hoon Hahn |
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dc.contributor.author |
Jin, Han Byul |
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dc.contributor.author |
Choi, Gahyun |
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dc.contributor.author |
Lee, Jung-Yong |
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dc.contributor.author |
Park, Kibog |
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dc.date.accessioned |
2023-12-19T21:39:20Z |
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dc.date.available |
2023-12-19T21:39:20Z |
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dc.date.created |
2016-01-12 |
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dc.date.issued |
2015-10-23 |
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dc.description.abstract |
Memory effect of graphene has been studied in various ways based on the Fermi-level shift driven by external electric field. From the current hysteresis loop obtained by changing the gate voltage of Graphene/SiO2/Si field effect transistor, the existence of two different channel conductivity states has been observed which can be used for a two-level memory device. [1] This phenomenon has been explained by the motion of hydroxides and hydrons ionized from the water molecules trapped between the graphene channel and the SiO2 gate insulator. [2] In this study, we fabricated a CVD-grown graphene field effect transistor on SiO2/Si substrate and found four different channel conductivity states tunable by varying the applied gate voltage pulse. It is shown that the stabilization of the reset state (off-state), which is one of the challenging issues in fabricating memory devices with this phenomenon, can be achieved by positioning the Fermi-level in the off-state as close to the charge neutrality point as possible during read-out. A constant gate voltage which is chosen to ensure the proper positioning of the off-state Fermi-level is always applied in read-out steps. This study demonstrates the possibility of fabricating graphene-based multi-bit memory devices. |
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dc.identifier.bibliographicCitation |
한국물리학회 가을 학술논문발표회 |
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dc.identifier.uri |
https://scholarworks.unist.ac.kr/handle/201301/41789 |
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dc.language |
영어 |
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dc.publisher |
한국물리학회 |
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dc.title |
Multi-Level Memory Effect of CVD Graphene Transferred on SiO2 by Gate-Voltage Controlled Hydron Adsorption |
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dc.type |
Conference Paper |
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dc.date.conferenceDate |
2015-10-21 |
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