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dc.citation.conferencePlace KO -
dc.citation.conferencePlace Jeju Island -
dc.citation.endPage 284 -
dc.citation.startPage 281 -
dc.citation.title 2012 International SoC Design Conference, ISOCC 2012 -
dc.contributor.author Rahmani, Amir-Mohammad -
dc.contributor.author Liljeberg, Pasi -
dc.contributor.author Plosila, Juha -
dc.contributor.author Man, Ka Lok -
dc.contributor.author Kim, Youngmin -
dc.contributor.author Tenhunen, Hannu -
dc.date.accessioned 2023-12-20T01:38:40Z -
dc.date.available 2023-12-20T01:38:40Z -
dc.date.created 2013-06-21 -
dc.date.issued 2012-11-04 -
dc.description.abstract Three-dimensional (3D) integration offers greater device integration, reduced signal delay and reduced interconnect power. It also provides greater design flexibility by allowing heterogeneous integration. Stacked mesh 3D NoC architecture was proposed to take advantage of the intrinsic capability of reducing the wire length in 3D ICs. However, this architecture still exacerbates the on-chip power density and router cost. In this paper, we propose a novel hybridization scheme for inter-layer communication using efficient 5-input routers to enhance the overall system power, performance, and area characteristics of the existing Hybrid NoC-Bus 3D mesh architecture. By defining a rule for routing algorithms called LastZ, the proposed area-efficient architecture decreases the overall average hop count of a NoC-based system compared to the existing architectures. We further improve this design by proposing partial-LastZ-based 3D NoC-bus hybrid architecture to provide adaptivity for implementing congestion-aware and fault-tolerant inter-layer routing algorithms. Extensive quantitative experiments demonstrate up to 16% performance improvement compared to the full LastZ-based 3D NoC-bus hybrid architecture and around 20% area reduction compared to the typical hybrid NoC-Bus 3D mesh architecture. -
dc.identifier.bibliographicCitation 2012 International SoC Design Conference, ISOCC 2012, pp.281 - 284 -
dc.identifier.doi 10.1109/ISOCC.2012.6407095 -
dc.identifier.isbn 978-146732988-0 -
dc.identifier.scopusid 2-s2.0-84873961156 -
dc.identifier.uri https://scholarworks.unist.ac.kr/handle/201301/37549 -
dc.identifier.url https://ieeexplore.ieee.org/document/6407095 -
dc.language 영어 -
dc.publisher 2012 International SoC Design Conference, ISOCC 2012 -
dc.title Partial-LastZ: An optimized hybridization technique for 3D NoC architecture enabling adaptive inter-layer communication -
dc.type Conference Paper -
dc.date.conferenceDate 2012-11-04 -

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