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| DC Field | Value | Language |
|---|---|---|
| dc.citation.conferencePlace | CH | - |
| dc.citation.conferencePlace | Taipei | - |
| dc.citation.endPage | 44 | - |
| dc.citation.startPage | 41 | - |
| dc.citation.title | 2012 IEEE Electrical Design of Advanced Packaging and Systems Symposium | - |
| dc.contributor.author | Han, Ki Jin | - |
| dc.contributor.author | Swaminathan, Madhavan | - |
| dc.date.accessioned | 2023-12-20T01:37:44Z | - |
| dc.date.available | 2023-12-20T01:37:44Z | - |
| dc.date.created | 2013-07-01 | - |
| dc.date.issued | 2012-12-09 | - |
| dc.description.abstract | TSV modeling method based on cylindrical modal basis functions is modified to consider the effect of depletion region formed by a DC bias voltage. Extended capacitance matrix equation is obtained to include depletion capacitances, and the new formula is inserted to the original formulation. The proposed method is tested for two TSVs with varying depletion depths, and the computed insertion losses, capacitance, and conductance show reasonable trends. | - |
| dc.identifier.bibliographicCitation | 2012 IEEE Electrical Design of Advanced Packaging and Systems Symposium, pp.41 - 44 | - |
| dc.identifier.doi | 10.1109/EDAPS.2012.6469430 | - |
| dc.identifier.isbn | 978-146731443-5 | - |
| dc.identifier.issn | 2151-1225 | - |
| dc.identifier.scopusid | 2-s2.0-84875486556 | - |
| dc.identifier.uri | https://scholarworks.unist.ac.kr/handle/201301/37408 | - |
| dc.identifier.url | https://ieeexplore.ieee.org/document/6469430 | - |
| dc.identifier.wosid | 000317015500011 | - |
| dc.language | 영어 | - |
| dc.publisher | IEEE | - |
| dc.title | Consideration of MOS Capacitance Effect in TSV Modeling Based on Cylindrical Modal Basis Functions | - |
| dc.type | Conference Paper | - |
| dc.date.conferenceDate | 2012-12-09 | - |
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