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김진국

Kim, Jingook
Integrated Circuit and Electromagnetic Compatibility Lab.
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dc.citation.conferencePlace IT -
dc.citation.conferencePlace Pisa -
dc.citation.endPage 26 -
dc.citation.startPage 23 -
dc.citation.title 6th IEEE Workshop on Signal Propagation on Interconnects, SPI -
dc.contributor.author Kim, Jingook -
dc.contributor.author Kim, Hyungsoo -
dc.contributor.author Jeong, Youchul -
dc.contributor.author Lee, Junho -
dc.contributor.author Kim, Joungho -
dc.date.accessioned 2023-12-20T06:09:02Z -
dc.date.available 2023-12-20T06:09:02Z -
dc.date.created 2013-07-17 -
dc.date.issued 2002-05-12 -
dc.description.abstract In the design of high-speed multi-layer board, the partitioning of the power/ground plane breaks return path of the signal current through either power plane or ground plane, which causes unwanted side effects such as reflection, crosstalk and radiation. In this paper, we have analyzed the effects of split power/ground plane on signal integrity experimentally and numerically. We have proposed equivalent circuit model of the signal traces crossing the ground slot, based on slot transmission line model. The reflection, transmission and crosstalk waveforms can be simulated and explained rigorously using the proposed model, regardless of the type of slot end. -
dc.identifier.bibliographicCitation 6th IEEE Workshop on Signal Propagation on Interconnects, SPI, pp.23 - 26 -
dc.identifier.doi 10.1109/SPI.2002.258281 -
dc.identifier.scopusid 2-s2.0-28444478584 -
dc.identifier.uri https://scholarworks.unist.ac.kr/handle/201301/35849 -
dc.identifier.url https://ieeexplore.ieee.org/document/4027646 -
dc.language 영어 -
dc.publisher 6th IEEE Workshop on Signal Propagation on Interconnects, SPI -
dc.title Slot transmission line model of interconnections crossing split power/ground plane on high-speed multi-layer board -
dc.type Conference Paper -
dc.date.conferenceDate 2002-05-12 -

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