CPS-SIM: Configurable and accurate clock precision solid state drive simulator

Abstract

NAND flash memory is the most widely used storage medium in embedded systems today due to its many advantages such as light weight, low power consumption, and shock resistance. Recently, solid state drives (SSDs), which use NAND flash memory to store data, are replacing conventional magnetic disks in laptops and some server computers. In the SSDs, to achieve both high performance and large capacity, a number of flash memory chips are connected to multiple buses and SSD firmware exploits parallel accesses by using interleaving and overlapping techniques. However, it is still unclear how many buses or chips should be used and how to drive those chips and buses to satisfy performance that may be required. To help answer these questions, we have developed a clock precision SSD simulator (CPS-SIM) that simulates the internal behavior of an SSD and that reports timing and utilization information. From the accurate timing and utilization results of CPS-SIM, we can discover the optimal hardware configuration including the number of buses and chips and their interconnections in an SSD. Also, it allows for fast development and verification of SSD firmware that runs an FTL (Flash Translation Layer) optimized for an SSD. Unlike FTLs for embedded flash memory, the FTL for an SSD must utilize the concurrency of the multiple chips and buses. By supporting concurrency, our CPS-SIM provides a flexible environment for design of SSD firmware that drives the multiple flash memory chips and also that schedules data transmissions via the multiple buses.