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김진국

Kim, Jingook
Integrated Circuit and Electromagnetic Compatibility Lab.
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dc.citation.conferencePlace KO -
dc.citation.conferencePlace Seoul -
dc.citation.title 2015 IEEE Electrical Design of Advanced Packaging & Systems Symposium -
dc.contributor.author Park, Junsik -
dc.contributor.author Lee, Jongsung -
dc.contributor.author Kim, Seongmoo -
dc.contributor.author Seol, Byongsu -
dc.contributor.author Kim, Jingook -
dc.date.accessioned 2023-12-19T21:10:50Z -
dc.date.available 2023-12-19T21:10:50Z -
dc.date.created 2016-01-11 -
dc.date.issued 2015-12-15 -
dc.description.abstract The system-level ESD coupling on a microstrip line is calculated using the partial element equivalent circuit (PEEC) method both in frequency and time domains. A simplified MNA matrix for the victim trace is proposed to quickly calculate the charge and current induced due to the ESD event. The calculated coupling transfer impedance and the ESD waveforms coupled on the traces are validated by comparison with measurements both in frequency and time domains. -
dc.identifier.bibliographicCitation 2015 IEEE Electrical Design of Advanced Packaging & Systems Symposium -
dc.identifier.doi 10.1109/EDAPS.2015.7383685 -
dc.identifier.scopusid 2-s2.0-84963811971 -
dc.identifier.uri https://scholarworks.unist.ac.kr/handle/201301/35447 -
dc.identifier.url http://ieeexplore.ieee.org/document/7383685/ -
dc.language 영어 -
dc.publisher IEEE -
dc.title Fast Calculation of System-Level ESD Noise Coupling to a Microstrip Line Using PEEC Method -
dc.type Conference Paper -
dc.date.conferenceDate 2015-12-14 -

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