dc.citation.conferencePlace |
SZ |
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dc.citation.conferencePlace |
Lausanne |
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dc.citation.endPage |
160 |
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dc.citation.startPage |
157 |
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dc.citation.title |
European Solid-State Circuits Conference |
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dc.contributor.author |
Kim, Minseo |
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dc.contributor.author |
Ha, Unsoo |
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dc.contributor.author |
Lee, Yongsu |
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dc.contributor.author |
Lee, Kyuho |
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dc.contributor.author |
Yoo, Hoi-Jun |
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dc.date.accessioned |
2023-12-19T20:09:23Z |
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dc.date.available |
2023-12-19T20:09:23Z |
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dc.date.created |
2018-08-07 |
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dc.date.issued |
2016-09-12 |
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dc.description.abstract |
An ultra-low power true random number generator (TRNG) based on sub-ranging SAR ADC is proposed. The proposed TRNG shares the coarse-ADC circuit with sub-ranging SAR ADC for area reduction. The shared coarse-ADC not only plays the role of discrete-time chaotic circuit or TRNG's entropy source but also reduces overall SAR ADC energy consumption by selectively activating the fine-SAR ADC. Also, the proposed dynamic residue amplifier and adaptive-reset comparator generate chaotic map with low power consumption. TRNG core occupies 0.0045mm 2 in 0.18μm CMOS technology and consumes 82nW at 270kbps throughput with 0.6V supply. The proposed TRNG passes all NIST tests and it achieves a state-of-the-art FOM of 0.3pJ/bit. |
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dc.identifier.bibliographicCitation |
European Solid-State Circuits Conference, pp.157 - 160 |
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dc.identifier.doi |
10.1109/ESSCIRC.2016.7598266 |
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dc.identifier.issn |
1930-8833 |
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dc.identifier.scopusid |
2-s2.0-84994418042 |
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dc.identifier.uri |
https://scholarworks.unist.ac.kr/handle/201301/35382 |
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dc.identifier.url |
https://ieeexplore.ieee.org/document/7598266/ |
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dc.language |
영어 |
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dc.publisher |
42nd European Solid-State Circuits Conference, ESSCIRC 2016 |
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dc.title |
A 82nW chaotic-map true random number generator based on sub-ranging SAR ADC |
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dc.type |
Conference Paper |
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dc.date.conferenceDate |
2016-09-12 |
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