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정홍식

Jeong, Hongsik
Future Semiconductor Technology Lab.
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dc.citation.endPage 1515 -
dc.citation.number 18 -
dc.citation.startPage 1514 -
dc.citation.title ELECTRONICS LETTERS -
dc.citation.volume 52 -
dc.contributor.author An, J. S. -
dc.contributor.author Choi, C. M. -
dc.contributor.author Shindo, Y. -
dc.contributor.author Sutou, Y. -
dc.contributor.author Jeong, H. S. -
dc.contributor.author Song, Y. H. -
dc.date.accessioned 2023-12-21T23:12:07Z -
dc.date.available 2023-12-21T23:12:07Z -
dc.date.created 2019-07-11 -
dc.date.issued 2016-09 -
dc.description.abstract The gradual erasing operation from reset state to set state adjusting pulse amplitude, duration time and falling time respectively in phase change device using Ge1Cu2Te3 is investigated. For this procedure, a relatively high voltage and increased falling time, which was able to produce both long-term potential and long-term depression in the time interval between pre-spike and post-spike is choosing. The results suggested that the presence of synaptic behaviour was due to controlled falling time rather than pulse amplitude. -
dc.identifier.bibliographicCitation ELECTRONICS LETTERS, v.52, no.18, pp.1514 - 1515 -
dc.identifier.doi 10.1049/el.2016.2211 -
dc.identifier.issn 0013-5194 -
dc.identifier.scopusid 2-s2.0-84983649244 -
dc.identifier.uri https://scholarworks.unist.ac.kr/handle/201301/27127 -
dc.identifier.wosid 000383378500005 -
dc.language 영어 -
dc.publisher INST ENGINEERING TECHNOLOGY-IET -
dc.title Investigation of an erasing method for synaptic behaviour in a phase change device using Ge1Cu2Te3 (GCT) -
dc.type Article -
dc.description.isOpenAccess FALSE -
dc.relation.journalWebOfScienceCategory Engineering, Electrical & Electronic -
dc.relation.journalResearchArea Engineering -
dc.type.docType Article -
dc.description.journalRegisteredClass scie -
dc.description.journalRegisteredClass scopus -

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