New integration technology of BST MIM capacitor with Pt spacer for application to 0.15 mu m DRAM and beyond

Abstract

New integration technology of BST MIM capacitor was developed, and it can be applied to 0.15 mu m DRAM cell capacitor and beyond. The storage node separation of Pt electrode was realized by analyzing etching mechanisms of the Pt electrode. The leakage mechanisms between BST and various electrodes were also investigated. BST MIM capacitor having Pt spacer was suggested and successfully integrated to serve many integration related issues of giga-bit scaled DRAMs. The electrical data satisfied requirements for 4 Giga-bit DRAM cell capacitor with leakage current of 2 similar to 3 fA per cell and capacitance about 15 fF per cell within operating voltage.