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Kim, Youngmin
Nano-scale(system) Design & Automation Lab
Research Interests
  • Design & Technology Co-Optimization (DTCO)
  • Variability-Aware and Robust Design Methodologies
  • Design for Manufacturability/Variability (DFM/V)
  • Low-Power and High Performance Circuit Design
  • 3D IC with TSV


A high resolution and high linearity 45 nm CMOS fully digital voltage sensor for low power applications

DC Field Value Language Ryu, Myunghwan ko Kim, Youngmin ko 2014-04-09T08:23:19Z - 2013-08-20 ko 2013-05 ko
dc.identifier.citation IEICE ELECTRONICS EXPRESS, v.10, no.13, pp.1 - 9 ko
dc.identifier.issn 1349-2543 ko
dc.identifier.uri -
dc.description.abstract This paper proposes a design of voltage sensor with new controllable delay element (CDE) having high linearity and high resolution. The proposed CDE uses power supply node to measure the voltage value. However, the delay increases exponentially at low voltage level. In this paper we add a PMOS header in parallel with the conventional CDE to compensate the delay degradation at lower voltage. We develop a 16-levels fully digital voltage sensor with a voltage range of 0.8 ~ 1.1V and 20mV resolution by using of the proposed delay elements. The proposed circuit is designed and simulated in a 45nm CMOS process. The simulation results show the feasibility of the high resolution and high linearity at low voltage by using of the proposed delay elements. ko
dc.description.statementofresponsibility open -
dc.language 영어 ko
dc.title A high resolution and high linearity 45 nm CMOS fully digital voltage sensor for low power applications ko
dc.type ARTICLE ko
dc.identifier.scopusid 2-s2.0-84880054959 ko
dc.identifier.wosid 000322732500008 ko
dc.type.rims ART ko
dc.description.wostc 0 *
dc.description.scopustc 0 * 2015-02-28 * 2014-07-12 *
dc.identifier.doi 10.1587/elex.10.20130400 ko
dc.identifier.url ko
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