dc.citation.endPage |
1701 |
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dc.citation.number |
9 |
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dc.citation.startPage |
1692 |
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dc.citation.title |
한국통신학회논문지 |
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dc.citation.volume |
19 |
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dc.contributor.author |
김경월 |
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dc.contributor.author |
김학선 |
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dc.contributor.author |
홍신남 |
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dc.contributor.author |
이형재 |
- |
dc.date.accessioned |
2023-12-22T12:43:52Z |
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dc.date.available |
2023-12-22T12:43:52Z |
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dc.date.created |
2017-03-14 |
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dc.date.issued |
1994-09 |
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dc.description.abstract |
Macromodeling technology is useful to su\imulate and analyze the performance of new elements and complicated circuits or systems without any changes in today's general simulator, PSPICE. In this paper, Phase Locked Loop(PLL) is designed using macromodeling technique. The PLL macromodel has two basic sub-macromodels of the phase detector and the voltage controlled oscillator(VCO). The PLL macromodel has two open terminals for inserting RC low pass filter. The PLL macromodel is simulated using simulation parameters of LM565CN manufactured in the National company. Ar a free-running frequency, 3600Hz, upper lock range and lower capture range was 437Hz, 563Hz, resoectively. Also, experimental results and simulation results of LM565CN PLL show good agreement. |
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dc.identifier.bibliographicCitation |
한국통신학회논문지, v.19, no.9, pp.1692 - 1701 |
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dc.identifier.issn |
1226-4717 |
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dc.identifier.uri |
https://scholarworks.unist.ac.kr/handle/201301/21635 |
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dc.identifier.url |
http://www.dbpia.co.kr/Journal/ArticleDetail/NODE00212351 |
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dc.language |
한국어 |
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dc.publisher |
한국통신학회 |
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dc.title |
PSPICE에 사용되는 위상동기루프 매크로모델에 관한 연구 |
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dc.type |
Article |
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dc.description.journalRegisteredClass |
other |
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