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김학선

Kim, Hak Sun
Internet of Things System Lab.
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PSPICE에 사용되는 위상동기루프 매크로모델에 관한 연구

Author(s)
김경월김학선홍신남이형재
Issued Date
1994-09
URI
https://scholarworks.unist.ac.kr/handle/201301/21635
Fulltext
http://www.dbpia.co.kr/Journal/ArticleDetail/NODE00212351
Citation
한국통신학회논문지, v.19, no.9, pp.1692 - 1701
Abstract
Macromodeling technology is useful to su\imulate and analyze the performance of new elements and complicated circuits or systems without any changes in today's general simulator, PSPICE. In this paper, Phase Locked Loop(PLL) is designed using macromodeling technique. The PLL macromodel has two basic sub-macromodels of the phase detector and the voltage controlled oscillator(VCO). The PLL macromodel has two open terminals for inserting RC low pass filter. The PLL macromodel is simulated using simulation parameters of LM565CN manufactured in the National company. Ar a free-running frequency, 3600Hz, upper lock range and lower capture range was 437Hz, 563Hz, resoectively. Also, experimental results and simulation results of LM565CN PLL show good agreement.
Publisher
한국통신학회
ISSN
1226-4717

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