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DC Field | Value | Language |
---|---|---|
dc.citation.endPage | 411 | - |
dc.citation.number | 2 | - |
dc.citation.startPage | 401 | - |
dc.citation.title | IEEE JOURNAL OF SOLID-STATE CIRCUITS | - |
dc.citation.volume | 51 | - |
dc.contributor.author | Kim, Mina | - |
dc.contributor.author | Choi, Seojin | - |
dc.contributor.author | Seong, Taeho | - |
dc.contributor.author | Choi, Jaehyouk | - |
dc.date.accessioned | 2023-12-22T00:11:10Z | - |
dc.date.available | 2023-12-22T00:11:10Z | - |
dc.date.created | 2015-11-01 | - |
dc.date.issued | 2016-02 | - |
dc.description.abstract | A low-jitter and fractional-resolution injectionlocked clock multiplier (ILCM) with a delay-locked-loop (DLL)- based process-voltage-temperature (PVT)-calibrator is proposed. The ring-type voltage-controlled oscillator (VCO) and the voltagecontrolled delay line (VCDL) of the DLL consist of identical delay cells, and they share the same control voltage. Thus, by changing the ratio between the numbers of stages of the VCDL and the VCO, the frequency of the VCO can be calibrated at any target frequencies, noninteger times the reference frequency. As the amount of the unit delay is adjusted continuously by the DLL, the VCO can overcome real-time frequency drifts as well as static process variations; thus, excellent jitter performance can be sustained during any environmental variations. The proposed ILCM, designed in the 65 nm CMOS process, generated output frequenciesthat range from 1.2 to 2.0 GHz with a frequency resolution of 40 MHz and a 400 MHz reference clock. When injection locked, the integrated jitter from 1 kHz to 40 MHz of the 1.6 GHz signal was 440 fs. The proposed real-time PVT calibrator restricted the degradations of phase noise and jitter over the temperature and the supply variations to less than 0.7 dB and 20%, respectively. The active area was 0.032 mm2 and the power consumption was 3.6 mW. | - |
dc.identifier.bibliographicCitation | IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.51, no.2, pp.401 - 411 | - |
dc.identifier.doi | 10.1109/JSSC.2015.2496781 | - |
dc.identifier.issn | 0018-9200 | - |
dc.identifier.scopusid | 2-s2.0-84947999112 | - |
dc.identifier.uri | https://scholarworks.unist.ac.kr/handle/201301/17721 | - |
dc.identifier.url | http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7331606 | - |
dc.identifier.wosid | 000370743100008 | - |
dc.language | 영어 | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | A Low-Jitter and Fractional-Resolution Injection-Locked Clock Multiplier Using a DLL-Based Real-time PVT-Calibrator with Replica-Delay Cells | - |
dc.type | Article | - |
dc.description.isOpenAccess | FALSE | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalResearchArea | Engineering | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.subject.keywordAuthor | Calibrator | - |
dc.subject.keywordAuthor | clock multiplier | - |
dc.subject.keywordAuthor | delay-locked-loop (DLL) | - |
dc.subject.keywordAuthor | injection locked | - |
dc.subject.keywordAuthor | jitter | - |
dc.subject.keywordAuthor | process-voltage-temperature (PVT) | - |
dc.subject.keywordAuthor | real-time | - |
dc.subject.keywordPlus | PLL | - |
dc.subject.keywordPlus | OSCILLATOR | - |
dc.subject.keywordPlus | VCO | - |
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