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Lee, Jongwon
Nanostructured Photonic Devices Lab.
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dc.citation.endPage 382 -
dc.citation.number 3 -
dc.citation.startPage 377 -
dc.citation.title IEEE TRANSACTIONS ON ELECTRON DEVICES -
dc.citation.volume 56 -
dc.contributor.author Ryu, Seong-Wan -
dc.contributor.author Lee, Jongwon -
dc.contributor.author Han, Jin-Woo -
dc.contributor.author Kim, Sungho -
dc.contributor.author Choi, Yang-Kyu -
dc.date.accessioned 2023-12-22T08:08:19Z -
dc.date.available 2023-12-22T08:08:19Z -
dc.date.created 2015-09-16 -
dc.date.issued 2009-03 -
dc.description.abstract A double-stacked nanocrystal (DSNC) Hash memory is presented for improvement of both program/erase speed and data retention time. Four combinations of nickel (Ni) and gold (An) (Ni/Ni, Au/Au, Ni/Au, and Au/Ni) are used as charge storage DSNC materials and are compared from the perspective of memory performance, Through experimental results for P/E efficiency and retention time, the optimized energy band lineup for faster P/E, and longer charge retention is presented. A combination of a deep potential well at the top and a shallow potential well at the bottom exhibits optimized performance in P/E, and this combination also shows the longest data retention characteristics. -
dc.identifier.bibliographicCitation IEEE TRANSACTIONS ON ELECTRON DEVICES, v.56, no.3, pp.377 - 382 -
dc.identifier.doi 10.1109/TED.2008.2011677 -
dc.identifier.issn 0018-9383 -
dc.identifier.scopusid 2-s2.0-62749140701 -
dc.identifier.uri https://scholarworks.unist.ac.kr/handle/201301/17231 -
dc.identifier.url http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=4773240 -
dc.identifier.wosid 000264019300004 -
dc.language 영어 -
dc.publisher IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC -
dc.title Designed Workfunction Engineering of Double-Stacked Metal Nanocrystals for Nonvolatile Memory Application -
dc.type Article -
dc.description.journalRegisteredClass scopus -

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